1. Field of the Invention
The present invention relates generally to techniques for reducing power consumption of radio frequency receivers and more specifically to methods and apparatus for dynamically managing power consumption of radio frequency receivers operating in interference environments via environment sensing.
2. Description of the Related Art
Current art for radio frequency (RF) receivers operating in a high interference or co-site environment generally take one of two approaches, both of which are expensive and dissipate high power:                a) Operate a receiver front end and intermediate frequency (IF) components at very high IP3 levels, i.e. utilize high powered components so that distortion does not occur; and,        b) Add additional hardware outside the receiver volume such as high performance filters, or active canceling circuitry. Filtering has a restricted area of benefit and active canceling is extremely expensive and has specific demands on the host vehicle's antenna architecture.        
The approach of operating a receiver front end and IF components at very high IP3 levels is often the only practical approach for operation in high interference and/or co-site environments. However, most receivers, especially those fielded on mobile platforms such as ground vehicles or aircraft will spend a significant amount of time in benign interference environments. While operating in benign environments, the high power applied to achieve high IP3 performance is wasted. This wasted power increases the operating temperature of receiving system with a corresponding reduction in its reliability.
RF and IF amplifier devices and mixers can and are being developed with programmable bias points that provide IP3 and corresponding compression point performance proportional to DC power consumption. Power reductions of 30% or more have been demonstrated with only minor variations in other important parameters such as gain, Noise Figure, stability, and voltage standing wave ratio (VSWR).
U.S. Pat. No. 7,116,949, issued to Kiyoshi Irie, etc., entitled, “Semiconductor Integrated Circuit Device and Wireless Communication System,” discloses a technology which may be effectively applied, while increase of power consumption is controlled, for improving linearity of a semiconductor integrated circuit device comprising an amplifying circuit to amplify the code division multiplexed transmitting signal. The technology may be effectively applied to a semiconductor integrated circuit device for communication constituting a wireless communication device, for example, of W-CDMA (Wideband Code Division Multiple Access) system and to a wireless communication device such as a mobile telephone or the like comprising the same semiconductor integrated circuit device.
U.S. Pat. No. 6,735,424, issued to Larson, et al., entitled, “S-band Low-noise Amplifier with Self-adjusting Bias for Improved Power Consumption and Dynamic Range in a Mobile Environment” discloses a discrete low-noise amplifier designed to operate in a mobile wireless environment. It uses two cascaded GaAs FETs to achieve 25 dB gain and 0.9 dB noise figure at 2.5 GHz. Active bias control circuitry responsive to a monitored amplifier output power automatically and continuously adjusts the drain-source currents, and the load lines, of the cascaded FETs to (i) maintain power consumption at 33 milliwatts in nominal small-signal conditions, and to (ii) provide an elevated input third-order intermodulation intercept point (IP3) and a reduced noise figure during the presence of jamming. A 15 dB improvement in the input IP3 is achieved in large-signal operation. Amplifier operation is supported by an a.c. power detector of enhanced sensitivity and responsiveness because of un-grounded operation.
U.S. Pub. No. 2006/0148437, to Krivokapic, entitled, “Circuit and Method for Reducing Mobile Station Receiver Power Consumption by Dynamically Controlling Linearity and Phase Noise Parameters” discloses a method of reducing mobile station power consumption. A comparison is made in a number of scenarios of a current channel gain setting for a receiver to a threshold. If the current channel gain setting is less than the threshold, then current within at least a portion of the receiver is decreased. In one scenario, the comparison is only made in event that no single tone interferer is detected. In another scenario, the comparison is made to a tolerable single tone blocker threshold, and if greater then current is decreased. In another scenario, the comparison is made to an acceptable intermodulation response rejection threshold, and if greater then current is decreased. In yet another scenario, the comparison is made to an acceptable spurious free dynamic range threshold, and if greater then current is decreased. The portions of the receiver for which current decreases are implemented include a low noise amplifier, mixer, voltage controlled oscillator and variable gain amplifiers.
U.S. Pub. No. 2006/0040630, to Mostov, et al., entitled, “Apparatus for and Method of Optimizing the Performance of a Radio Frequency Receiver in the Presence of Interference” discloses an apparatus for and method of extending the dynamic range of a RF communications receiver. The invention provides a mechanism for controlling the gain of both the LNA and down conversion mixer in the front end portion of an RF receiver. Both the LNA and the mixer are adapted to have both low and high gain modes of operation. The control mechanism typically comprises a two bit gain control that places both the LNA and mixer in one of four operating gain mode states. The selection of the most appropriate operating gain mode state is preferably determined in accordance with various metrics such as the received levels of the desired signal, levels of interference signals, bit error rate and receiver RSSI.
Referring now to FIG. 1 (Prior Art), the architecture of a typical wideband, dual-conversion RF receiver is illustrated. The receiver may include an antenna (ANT), an RF full band filter (F1), an RF amplifier (A1), an RF sub-band filter (F2), a first local oscillator (LO1), an RF mixer (M1), a first IF amplifier (A2), a first IF wide band filter (F3), a second local oscillator (LO2), an IF mixer (M2), a secondary IF amplifier (A3), a second IF narrow band filter (F4), another secondary IF amplifier (A4) and a digital signal processing (DSP) subsystem. Each filter starting from the antenna input gets successively narrower. The final channel selectivity is implemented in the DSP. The RF amplifier (A1) has the widest frequency bandwidth at its input (1 GHz in this example) with each stage of amplification or mixing susceptible to a narrower frequency bandwidth. However due to the cascading of gain through the active stages, the later stages can have a larger signal level at their inputs. In the presence of large, undesired signal, high dynamic range (i.e. high IP3) RF devices are required to minimize receiver performance degradation due to Intermodulation Products, Cross-Modulation, and Desensitization. In the system illustrated in FIG. 1, there is no way to estimate the level of interference that may be occurring within the receiver since only the DSP has any knowledge of the desired signal integrity. The DSP has no way of determining that the desired signal was degraded elsewhere in the receiver. In order to minimize desired signal degradation, all devices continuously operate at full bias. As a result, while operating in benign environments, the high power applied to achieve high IP3 performance is wasted. This wasted power increases the operating temperature of the receiver with a corresponding reduction in its reliability.